cortex-m3 系统异常相关寄存器

enc28j60 驱动和 udp 协议栈移植到 stm32 成功

1. 手动挂起、清除系统异常和中断挂起示意

软件挂起

类型	NMI	PendSV	SysTick
寄存器位	NMIPENDSET	PENDSVSET	PENDSTSET

软件清除

类型	PendSV	SysTick
寄存器位	PENDSVCLR	PENDSVCLR

中断挂起状态示意

ISRPENDING

寄存器: SCB_ICSR(Interrupt Control and state register)

2. 设置系统异常优先级

寄存器: SCB_SHPRx(System handler priority)

3. 使能 fault，和挂起状态、活动状态示意

使能

类型	Usage fault	Bus fault	mem fault
寄存器位	USGFAULTENA	BUSFAULTENA	MEMFAULTENA

挂起状态

类型	SVC	Bus fault	mem fault	Usage fault
寄存器位	SVCALLPENDED	BUSFAULTPENDED	MEMFAULTPENDED	USGFAULTPENDED

活动状态

类型	SysTick	PendSV	Debug Monitor	SVC	Usage fault	Bus fault	Mem fault
寄存器位	SYSTICKACT	PENDSVACT	MONITORACT	SVCALLACT	USGFAULTACT	BUSFAULTACT	MEMFAULTACT

寄存器: SCB_SHCSR(System handler control and state register)

一个 dump 出 scb(System control block 系统控制块) 的函数, 调试的时候有时很有用

#define PRIORITY_Msk 0xF0
#define PRIORITY_Pos 4
void dump_scb()
{
	uint32_t icsr = SCB->ICSR;
	uint32_t shcsr = SCB->SHCSR;
 
	printf("ICSR:\r\n");
	printf("\t there %s interrupt pending\r\n", 
		(icsr & SCB_ICSR_ISRPENDING_Msk) ? "is" : "isn't");
	printf("\t pending exception number:%u\r\n", 
		(icsr & SCB_ICSR_VECTPENDING_Msk) >> SCB_ICSR_VECTPENDING_Pos);
	printf("\t active exception number:%u\r\n", 
		(icsr & SCB_ICSR_VECTACTIVE_Msk) >> SCB_ICSR_VECTACTIVE_Pos);
 
	printf("SHPRx:\r\n");
	printf("\t Mem Manage:%hhd\r\n", (SCB->SHP[0] & PRIORITY_Msk) >> PRIORITY_Pos);
	printf("\t Bus Fault:%hhd\r\n", (SCB->SHP[1] & PRIORITY_Msk) >> PRIORITY_Pos);
	printf("\t Usage Fault:%hhd\r\n", (SCB->SHP[2] & PRIORITY_Msk) >> PRIORITY_Pos);
 
	printf("\t SVC:%hhd\r\n", (SCB->SHP[7] & PRIORITY_Msk) >> PRIORITY_Pos);
	printf("\t Debug Monitor:%hhd\r\n", (SCB->SHP[8] & PRIORITY_Msk) >> PRIORITY_Pos);
 
	printf("\t PendSV:%hhd\r\n", (SCB->SHP[10] & PRIORITY_Msk) >> PRIORITY_Pos);
	printf("\t SysTick:%hhd\r\n", (SCB->SHP[11] & PRIORITY_Msk) >> PRIORITY_Pos);
 
	printf("SHCSR:\r\n");
	printf("\t Usage Fault enable:%u\r\n",
		(shcsr & SCB_SHCSR_USGFAULTENA_Msk) >> SCB_SHCSR_USGFAULTENA_Pos);
	printf("\t Bus Fault enable:%u\r\n",
		(shcsr & SCB_SHCSR_BUSFAULTENA_Msk) >> SCB_SHCSR_BUSFAULTENA_Pos);
	printf("\t Mem Fault enable:%u\r\n",
		(shcsr & SCB_SHCSR_MEMFAULTENA_Msk) >> SCB_SHCSR_MEMFAULTENA_Pos);
 
	printf("\r\n");
 
	printf("\t SVCall pended:%u\r\n",
		(shcsr & SCB_SHCSR_SVCALLPENDED_Msk) >> SCB_SHCSR_SVCALLPENDED_Pos);
	printf("\t Bus Fault pended:%u\r\n",
		(shcsr & SCB_SHCSR_BUSFAULTPENDED_Msk) >> SCB_SHCSR_BUSFAULTPENDED_Pos);
	printf("\t Mem Fault pended:%u\r\n",
		(shcsr & SCB_SHCSR_MEMFAULTPENDED_Msk) >> SCB_SHCSR_MEMFAULTPENDED_Pos);
	printf("\t Usage Fault pended:%u\r\n",
		(shcsr & SCB_SHCSR_USGFAULTPENDED_Msk) >> SCB_SHCSR_USGFAULTPENDED_Pos);
 
	printf("\r\n");
 
	printf("\t SysTick active:%u\r\n",
		(shcsr & SCB_SHCSR_SYSTICKACT_Msk) >> SCB_SHCSR_SYSTICKACT_Pos);
	printf("\t PendSV active:%u\r\n",
		(shcsr & SCB_SHCSR_PENDSVACT_Msk) >> SCB_SHCSR_PENDSVACT_Pos);
	printf("\t Monitor active:%u\r\n",
		(shcsr & SCB_SHCSR_MONITORACT_Msk) >> SCB_SHCSR_MONITORACT_Pos);
	printf("\t SVCall active:%u\r\n",
		(shcsr & SCB_SHCSR_SVCALLACT_Msk) >> SCB_SHCSR_SVCALLACT_Pos);
	printf("\t Usage Fault active:%u\r\n",
		(shcsr & SCB_SHCSR_USGFAULTACT_Msk) >> SCB_SHCSR_USGFAULTACT_Pos);
	printf("\t Bus Fault active:%u\r\n",
		(shcsr & SCB_SHCSR_BUSFAULTACT_Msk) >> SCB_SHCSR_BUSFAULTACT_Pos);
	printf("\t Mem Fault active:%u\r\n",
		(shcsr & SCB_SHCSR_MEMFAULTACT_Msk) >> SCB_SHCSR_MEMFAULTACT_Pos);
}
 
#define DIVBYZERO_Pos 9
#define DIVBYZERO_Msk (1ul << DIVBYZERO_Pos)
#define UNALIGNED_Pos 8
#define UNALIGNED_Msk (1ul << UNALIGNED_Pos)
#define NOCP_Pos 3
#define NOCP_Msk (1ul << NOCP_Pos)
#define INVPC_Pos 2
#define INVPC_Msk (1ul << INVPC_Pos)
#define INVSTATE_Pos 1
#define INVSTATE_Msk (1ul << INVSTATE_Pos)
#define UNDEFINSTR_Pos 0
#define UNDEFINSTR_Msk (1ul << UNDEFINSTR_Pos)
void dump_ufsr()
{
	uint16_t ufsr = (SCB->CFSR & SCB_CFSR_USGFAULTSR_Msk) >> SCB_CFSR_USGFAULTSR_Pos;
	printf("UFSR:\r\n");
	printf("\t Divide by zero: %d\r\n", 
		(ufsr & DIVBYZERO_Msk) >> DIVBYZERO_Pos);
	printf("\t Unaligned access: %d\r\n", 
		(ufsr & UNALIGNED_Msk) >> UNALIGNED_Pos);
	printf("\t No coprocessor: %d\r\n", 
		(ufsr & NOCP_Msk) >> NOCP_Pos);
	printf("\t Invaild PC load: %d\r\n", 
		(ufsr & INVPC_Msk) >> INVPC_Pos);
	printf("\t Invaild state(attempt to entry ARM state): %d\r\n", 
		(ufsr & INVSTATE_Msk) >> INVSTATE_Pos);
	printf("\t Undefined instruction: %d\r\n", 
		(ufsr & UNDEFINSTR_Msk) >> UNDEFINSTR_Pos);
}